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GATEROCKET DEVELOPS ROCKETDRIVE FOR ALTERA STRATIX IV FPGAs

Ultimate FPGA Verification/Debug Solutions Coming to DVCon Feb. 24-25

Bedford, Mass. - (February 17, 2009) - GateRocket^® Inc. today announced the development of its RocketDrive^® for Altera's Stratix® IV FPGAs.  The RocketDrive cuts verification and in-system debug time for advanced single or multi-FPGA based projects while adding significant value through seamless integration with a design team's existing verification environment, with no changes to the flow or verification methodology. 

The GateRocket team will demonstrate its products at DVCon later this month (Feb. 24-25, San Jose, CA), Booth 505.  Interested parties may also register for product demos at:  www.gaterocket.com/dvCon_2009.

"Our Stratix IV 40-nm FPGAs deliver the industry's highest density, highest performance, and lowest power," said David Greenfield, senior director of marketing, high-end FPGAs, at Altera.  "Customers integrating GateRocket's FPGA verification solutions into their design toolkit will be able to significantly reduce the verification and debug time of their Stratix IV FPGA designs."

            GateRocket offers two products:  RocketDrive, a disk-drive sized peripheral that acts as an FPGA-based "turbo-charger" to an HDL simulator, and RocketVision, a companion software debugging option that can cut weeks or months off of lab debug time.

RocketDrive^® is available in several configurations, each containing the largest FPGA in its respective device family.  RocketDrive also includes all the software required to set up and control the device and integrate it into an existing FPGA design verification environment.

RocketVision^® is an advanced debugging package that delivers additional value from the RocketDrive system by providing simulators with visibility into the FPGA hardware and automated diagnosis by comparing intended behavior with actual results in the FPGA.  With RocketVision, users can quickly identify the root cause of errors typically found only in the lab, and save weeks of in-system hardware debugging.

"We've been pleased with the reception of the market to the Stratix IV RocketDrive," Said Dave Orecchio, President and CEO of GateRocket.  "We currently have several pre-orders from key customers in the wired and wireless communications markets in the US," he added. 

The RocketDrive takes minutes to install in any Linux PC and integrates seamlessly with the user's existing design and verification environment.  The RocketDrive complements software design tools from the leading design automation tool vendors including Cadence Design Systems (CDNS), Mentor Graphics Corp. (MENT), Synopsys, Inc. (SNPS), Synplicity, Inc., and the FPGA vendor tools. 

A recent Chip Design feature article on FPGA verification and debug containing an analysis of GateRocket credited it with "dramatically speeding the debugging of the FPGA design and significantly reducing time-to-market."  The complete article is available online at:  http://www.gaterocket.com/chipdesign_article.

            Pricing and Availability:  RocketDrives for the Altera Stratix IV family will be available Q2, 2009.  For more information and to receive a complimentary customer case study, contact GateRocket online at:  www.gaterocket.com/contact.

About GateRocket:  GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native^® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketDrive enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time to market, and realize more reliable and predictable results.  Learn more about GateRocket online at http://www.gaterocket.com/ and sign up for a free webinar.

GATEROCKET EXECS SPEAKING AT

FPGA SUMMIT IN SAN JOSE

CEO, CTO Deliver Early Christmas Present With Talks On Simplifying FPGA Verification & Debug

            Bedford, Mass. - Dec. 2, 2008 - At the first annual FPGA Summit coming to San Jose next week, GateRocket executives Dave Orecchio, CEO; and Chris Schalick, CTO will participate in tutorial and technical sessions on the thorny issue of FPGA verification and debug.  Orecchio is hosting tutorial session T3B at 2:40 PM on Wednesday afternoon with experts from Mentor Graphics, GateRocket, Altera, Agilent Technologies and Xilinx.  The FPGA Summit runs Dec. 9-11 at the Wyndham Hotel in San Jose, Calif.

"FPGA verification and debug is the number-one issue that affects time-to-market of FPGA based products," Orecchio said.  "I'm pleased to have this opportunity to share some of the new techniques and products to speed verification and debug now available from GateRocket," he added.  

"I am grateful to the organizers of this new and exciting conference for giving us the chance to discuss how designers can quickly eliminate the verification bottleneck and significantly reduce in-system debug time," said Schalick. 

            The FPGA Summit will focus on the latest hardware and design news in the FPGA world and includes three days of technical sessions and impressive keynote speakers.  GateRocket's Orecchio will participate in Wednesday's (Dec. 10) Verification Tutorial and hold court as the Summit's designated "Verification Expert" during Wednesday night's reception.  CTO Schalick will speak on the topic of Hardware Assisted Verification Wednesday afternoon.  For more information on the FPGA Summit and a detailed conference Program:  http://www.fpgasummit.com/.

About GateRocket:  GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native verification and debug solution for advanced FPGA semiconductor devices. The company's RocketDrive enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time to market, and more reliable results.  Learn more about GateRocket online at http://www.gaterocket.com/ and sign up for a free webinar.

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 GATEROCKET SHIPS ADVANCED FPGA VERIFICATION SOLUTION FOR VIRTEX-5 FPGAs

VerificationTime Blasts Off 10-30X Faster With Innovative RocketDrive

            Bedford, Mass. - October 1, 2008 - GateRocket^® Inc. today announced availability of its RocketDrive^® for Virtex®-5 FPGAs from Xilinx.  The RocketDrive cuts verification and in-system debug time for advanced single or multi-FPGA based projects while adding significant value through seamless integration to a design team's existing design verification environment, without a change in design flow or verification methodology. 

            "Xilinx Virtex-5 devices are the industry's predominant high-performance FPGAs and in many instances are being used to replace ASICs in applications such as wireless networking, imaging, defense and more," said GateRocket President and CEO Dave Orecchio.  "The RocketDrive's ability to speed verification, debug and time-to-market of products using FPGA devices will further increase the penetration of Virtex-5 FPGAs because it eliminates the verification bottleneck and significantly reduces in-system debug time."  

            "GateRocket's support for our Virtex-5 FPGAs, including the newly available Virtex-5 SX240T and Virtex-5 FX200T devices, enables companies to bring sophisticated products to market faster while benefiting from the technical innovation that the Virtex-5 product family delivers to system architects," said Tom Feist, senior marketing director of the Xilinx ISE® Design Suite.  "The more advanced designs get, the more important new verification technologies become.  We are happy to have GateRocket as a partner focused in this space."  

           Product: The RocketDrive is a faster and more accurate verification and debugging solution for FPGAs than traditional software-only approaches.  It offers the ability to exhaustively verify and debug an FPGA design before committing to production.  This is accomplished by exposing bugs that would normally only be found in the lab much earlier in the design phase, enabling shorter product development times, higher product quality and improved product performance. 

The RocketDrive helps speed time-to-market through:

• Rapid, deterministic, debug with functional fault root-cause identification in HDL source
• Simulation acceleration for both design and regressions development phases
• 3^rd party IP block validation by comparison of simulation models and FPGA hardware
• FPGA team design gains module HDL level, hardware validation, before integration
• Capture hidden simulation model, synthesis and place & route tool chain faults easily

            The solution is very powerful since it allows the designer complete flexibility to place any portions of the FPGA design into the RocketDrive and seamlessly integrate it with their verification platform.  This allows the FPGA to be used natively to (1) speed verification by replacing FPGA software models with actual hardware; (2) investigate hardware bugs and test alternatives; and (3) run application level software against a Device Native^® representation of the design.

            The RocketDrive takes minutes to install in any Linux PC and integrates seamlessly with the user's existing design and verification environment.  The RocketDrive complements software design tools from the leading design automation tool vendors including Cadence Design Systems (CDNS), Mentor Graphics Corp. (MENT), Synopsys, Inc. (SNPS), Synplicity, Inc., and the FPGA vendor tools. 

            Availability:  Virtex-5 RocketDrives are immediately available for all three device types.  RocketDrives employ the largest device in each family so that the drive can be used on a multitude of projects. 

• RD311 for designs with the LX330T device
• RD312 for designs with the SX240T device
• RD314 for designs with the FX200T device

About GateRocket:  GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native verification and debug solution for advanced FPGA semiconductor devices. The company's RocketDrive enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time to market, and more reliable results.  Learn more about GateRocket online and sign up for a free webinar.

About Xilinx Virtex-5 FPGAs: Named 'Product and Innovation of the Year' by EDN Magazine, the Virtex-5 family represents the fifth generation in the award-winning Virtex series. Built upon the industry's most advanced 65nm triple-oxide technology, breakthrough new ExpressFabric(TM) technology and proven ASMBL(TM) architecture, the Virtex-5 family includes four domain-optimized platforms for high-speed logic, digital signal processing (DSP), embedded processing and serial connectivity applications. Production devices are shipping now and may be purchased online or through Xilinx distributors. Visit http://www.xilinx.com/virtex5 for more information.         

 GATEROCKET RECEIVES $3M IN VENTURE FINANCING

-- Building out team to deliver advanced FPGA verification and debug solutions --

GateRocket^® Inc. today announced that it has completed a $3 million Series-A round of financing of led by New Atlantic Ventures, Massachusetts Technology Development Corporation (MTDC), and Long River Ventures.  Seed-stage investors and Angel groups also participated to bring the total GateRocket has now raised to $4.5 million.  This round of financing will enable the company to engage more customers and broadly deploy its compelling solution for Field Programmable Gate Array (FPGA) verification and debug. 

Electronics companies are shifting their use of semiconductors from very expensive custom chips called Application Specific Integrated Circuits (ASICs) to FPGAs.  Today, 96 out of every 100 chip design projects use FPGAs.  New FPGAs have become far more capable than earlier versions with capacity and performance doubling each year, making them the favorite for many market segments.  The skyrocketing complexity of these next-generation FPGAs has created a crisis since design engineers experience extreme difficulty getting their chips to work with existing software design tools.  GateRocket solves this problem with a new product that cuts time-to-market by streamlining design verification and slashing system debug time by 10-30X versus existing methods.

"We are very excited about GateRocket's opportunity given the rapid move to FPGAs and the challenges that electronic engineers face when bringing products to market," said Todd Hixon, Managing Director of New Atlantic Ventures.  "FPGA semiconductor use is at an inflection point and GateRocket's product enables aggressive use of these devices by OEMs and therefore is a catalyst for accelerated FPGA market growth."

With this financing, GateRocket will increase its team in its Bedford Mass. office by adding both sales and development resources.  "We are looking forward to expanding our team to satisfy the demand for our products," said Dave Orecchio, GateRocket President and CEO.

Product: GateRocket's RocketDrive^®; it is a faster and more accurate verification and debugging solution for FPGAs than traditional software-only approaches.  The RocketDrive offers the ability to exhaustively validate and test an FPGA design before committing to production by exposing bugs you would only find in the lab early in the design phase, enabling shorter product development times, higher product quality and improved performance.      

The solution is very powerful since it allows the designer to place any portions of the FPGA design into the RocketDrive and seamlessly integrate it with their verification platform.  This allows the FPGA to be used natively to (1) speed verification by replacing FPGA software models with actual hardware; (2) investigate hardware bugs and test alternatives; and (3) run application level software against a Device Native^® representation of the design.

The RocketDrive takes minutes to install in any Linux PC and integrates seamlessly with the user's existing design and verification environment.  The RocketDrive complements software design tools from the leading design automation tool vendors including Cadence Design Systems (CDNS), Mentor Graphics Corp. (MENT), Synopsys, Inc. (SNPS), Synplicity, Inc., and the FPGA vendor tools from Altera Corp. (ALTR) and Xilinx, Inc. (XLNX). 

GATEROCKET WINS 2007 TOP PRODUCTS HONORS IN EDN, ELECTRONIC DESIGN MAGAZINES

Bedford, Mass. – Jan. 8, 2008: GateRocket’s RocketDrive™ made the 2007 top products lists in both EDN and Electronic Design magazines. EDN announced its Top 100 products in the Dec. 14 issue, and Electronic Design highlighted RocketDrive in its “Best Electronic Design” year end special on Dec. 3. The innovative RocketDrive was launched in April 2007.

“It’s a thrill to be recognized along with some of the industry’s great innovators by the leading electronics journals,” said Dave Orecchio, GateRocket president and CEO. “Many thanks to the editors for this great honor.”

In 2008 there will be nearly 95,000 new FPGA design projects according to Gartner/Dataquest, 32 times that of ASICs. While verification and debug of an FPGA is as challenging as any modern ASIC design, until RocketDrive there was no practical and economical solution to this daunting verification and debug problem.

The RocketDrive Device Native™ verification and debug solution is powered by the speed of hardware with the accuracy of the true chip behavior. An industry first, RocketDrive offers the ability to exhaustively validate and test an FPGA design before committing to production, enabling shorter product development times, higher product quality and improved ability to meet or exceed the requirements of today’s demanding marketplace.
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GateRocket’s solution allows the verification engineer to place any portions or all of the FPGA design into the RocketDrive and automatically integrate it into their existing simulation environment. This allows the FPGA to be used natively to (1) speed verification by replacing FPGA models with actual hardware; (2) investigate hardware bugs and test alternatives; and (3) run application level software against a Device Native representation of the design.

In 2007 there will be nearly 89,000 FPGA design starts according to Gartner/Dataquest, some 25 times that of ASICs. While verifying an FPGA is as challenging as any modern ASIC design, until RocketDrive there was no practical and economical solution to this daunting problem.

The RocketDrive Device Native verification solution is powered by the speed of hardware, the accuracy of the true chip behavior and the unbounded scalability of a system prototype. An EDA first, RocketDrive offers the ability to exhaustively validate and test an FPGA design before committing to production, enabling shorter product development times, higher product quality and improved performance to meet or exceed the requirements of today’s demanding marketplace. GateRocket’s software allows the verification engineer to place any portions of the FPGA design into the RocketDrive and integrate it to their existing simulation platform. This allows the FPGA to be used natively to (1) speed verification by replacing FPGA models with actual hardware; (2) investigate hardware bugs and test alternatives; and (3) run application level software against a Device Native representation of the design.

The GateRocket team looks forward to seeing you at the conference.

GATEROCKET DELIVERS THE EDA INDUSTRY’S FIRST DEVICE NATIVE VERIFICATION SOLUTION FOR ADVANCED FPGAs

- Ups Speed, Accuracy, Scalability in FPGA Design -

Bedford, Mass. – April 23, 2007: GateRocket Inc. today announced availability of the industry’s first Device Native verification product that gives Field Programmable Gate Array (FPGA) designers the power to validate designs with one to two orders of magnitude faster simulation, and realize actual device behavior early in the design process. RocketDrive™ is a hardware and software solution that adds significant value to existing design verification environments without a change in design flow or verification methodology.

RocketDrive: The RocketDrive Device Native verification solution is powered by the speed of hardware, the accuracy of the true chip behavior and the unbounded scalability of a system prototype. An EDA first, RocketDrive offers the ability to exhaustively validate and test an FPGA design before committing to production, enabling shorter product development times, higher product quality and improved performance to meet or exceed the requirements of today’s demanding marketplace. GateRocket’s software allows the verification engineer to place any portions of the FPGA design into the RocketDrive and link it to his or her existing simulation platform. This allows the FPGA to be used natively to (1) speed verification by replacing FPGA models with actual hardware; (2) investigate hardware bugs and test alternatives; and (3) run application level software against a Device Native representation of the design.

Traditional emulation environments strive to be technology independent, but suffer from long and arduous startup efforts for each project and produce inaccurate results. GateRocket’s new approach leverages the strength and uniqueness of the FPGA device and the flexibility of popular simulators to deliver a unique and accurate verification solution for these advanced design projects.

In addition, the RocketDrive enables rapid, accurate analysis of IP components by removing the need for special and inaccurate software models since the IP resides directly in the target FPGA device that is in the RocketDrive. For the first time, the designer sees the real on-chip IP behavior while operating within their existing flexible simulation and test verification environment.

“When making the transition from ASIC to FPGA design, I soon realized there was a serious lack of tools to verify and test these sophisticated devices,” said Chris Schalick, GateRocket founder, Vice President of Engineering and CTO. “I had an idea and the passion to address this acute debugging and verification problem, so that’s when I started GateRocket to solve this industry dilemma and serve this fast-growing market.”

Integrated Solution: The RocketDrive takes minutes to install in any Linux PC and integrates seamlessly with the user’s existing design and verification environment. The RocketDrive complements design tools from all leading EDA vendors including Cadence Design Systems (CDN), Mentor Graphics Corp. (MENT), Synopsys, Inc. (SNPS), Synplicity, Inc. (SYNP), and the FPGA vendor tools from Altera Corp. (ALTR) and Xilinx, Inc. (XLNX).

Changing Marketplace: As FPGA devices become more advanced they disruptively capture more and more of the ASIC marketplace. The FPGA market, dominated by Altera and Xilinx, has some 25 times the number of design starts than that of the ASIC market according to Gartner/Dataquest. The classical ASIC design and verification bottleneck still exists in FPGA design, yet till now no adequate tools have been available to address this burning market need. A significant commercial opportunity exists to address the design and verification bottleneck for these sophisticated FPGA devices.

“Electronics companies use FPGAs to miniaturize their products while significantly increasing features to meet market demand and create new markets; however electronic design engineers face a crisis in their inability to adequately verify and test these increasingly complex designs,” said Dave Orecchio, GateRocket’s President and CEO. “GateRocket’s solution addresses this problem with the unique and highly productive Device Native approach that can cut in half the time it takes to develop the electronic products we use every minute of every day,” he added.

Pricing and Availability: RocketDrives are immediately available for the Altera Stratix II and the Xilinx Virtex 4 family of devices. Contact GateRocket to learn more.

GateRocket at DAC: GateRocket will be exhibiting at the 2007 Design Automation Conference in San Diego California (June 4 - 7), Booth 2559.

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GATEROCKET SECURES SEED FINANCING ROUND LED BY COMMON ANGELS

- Appoints Dave Orecchio as President and CEO - Establishes Advisory Board -

Bedford, Massachusetts, September 15, 2006: GateRocket, Inc. today announced that it has secured $1,250,000 of Seed financing. The round was led by the prestigious CommonAngels with participation from a consortium of several other angel groups in the New England area including Beacon Angels, Cherrystone, Granite State Angels, Launchpad, Maine Angels and North Country Angels.

GateRocket Leadership: With the financing, GateRocket rounds out its executive management with the appointment of Dave Orecchio as President and CEO. Dave has 24 years of semiconductor industry experience at four venture backed companies with a focus on semiconductors, ASIC and FPGA design and development. His leadership brought three of the four companies to successful exits for the investors and stakeholders. Prior to GateRocket, Dave held executive positions in marketing, sales and general management at LTX, Viewlogic Systems, Inc, Synopsys, Innoveda, Parametric Technologies and DAFCA.

“When I reviewed the GateRocket product and vision, I saw an opportunity to create a great company built on the foundation of a truly groundbreaking product,” said Dave Orecchio, GateRocket’s President and CEO. “It is seldom where you find the perfect storm of the right technology at the right time with a fantastic team to execute on its vision. GateRocket has all of these properties,” he added.

Outside Directors: GateRocket has well established world-class leadership with outside board members and EDA and technology luminaries Alain Hanover and Jim Daniell.

Alain Hanover, was the founder and CEO of Incert Software Corporation and Viewlogic Systems, Inc., and is currently CEO at Navigator Technology Ventures.

Jim Daniell, a serial entrepreneur, was COO at AT&T’s Network Commerce Services, and held leadership roles at several startup companies before joining Echelon Ventures as Managing Director.

Advisory Board: GateRocket gains significant benefit from its technical advisory board, one with industry veterans with experience in EDA startups, business development, and finance. The Advisory Board includes Michael D’Amour, Brad Hafer, John McFee and Stacy Swider.

Mike D’Amour is COO at DRC Computer Corp. Mike is best known for his founding of Quickturn Design Systems, Inc., where he served as CEO, Chairman, and Executive VP of R&D. Mike led the company to a successful IPO and later an acquisition by Cadence Design Systems, Inc.

Brad Hafer is Managing Director at Minuteman Advisory Partners, LLC, a strategy consulting firm focused on high-tech corporate development. Brad was most recently VP of Corporate Development at Matrix One.

John MacFee is CFO at eDialog, Inc. In his many start-up experiences, John played a significant leadership role in their early stage development, rapid growth and subsequent initial public offerings.

Stacy Swider is an entrepreneur and consultant to high technology companies in the Boston area. Stacy provided business leadership for GateRocket from inception to the acquisition of financing and now plays an important role as advisor to GateRocket.

GATEROCKET PRESENTS INNOVATIVE CONCEPTS AT DVCON

- MERGING ASIC AND FPGA DESIGN TECHNIQUES TO CUT DESIGN TIME -

Bedford, Massachusetts, February, 2005: GateRocket, Inc. today announced participation in DVCon and the presentation of a paper titled MERGING ASIC AND FPGA DESIGN TECHNIQUES TO CUT DESIGN TIME. The paper will be presented by GateRocket Founder Chris Schalick on Tuesday February 15th in Session 6 - Advances in Design.

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