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GATEROCKET BRINGING FPGA VERIFICATION BREAKTHROUGH TO DAC

Bedford, Mass. – May 10, 2007: Startup GateRocket is bringing its breakthrough FPGA verification product – RocketDrive – to the electronic design community’s premier event, the Design Automation Conference (DAC). The DAC event is held from June 4th through the 8th at the San Diego, California Convention Center. GateRocket will exhibit in booth 2559.

In 2007 there will be nearly 89,000 FPGA design starts according to Gartner/Dataquest, some 25 times that of ASICs. While verifying an FPGA is as challenging as any modern ASIC design, until RocketDrive there was no practical and economical solution to this daunting problem.

The RocketDrive Device Native verification solution is powered by the speed of hardware, the accuracy of the true chip behavior and the unbounded scalability of a system prototype. An EDA first, RocketDrive offers the ability to exhaustively validate and test an FPGA design before committing to production, enabling shorter product development times, higher product quality and improved performance to meet or exceed the requirements of today’s demanding marketplace. GateRocket’s software allows the verification engineer to place any portions of the FPGA design into the RocketDrive and integrate it to their existing simulation platform. This allows the FPGA to be used natively to (1) speed verification by replacing FPGA models with actual hardware; (2) investigate hardware bugs and test alternatives; and (3) run application level software against a Device Native representation of the design.

The GateRocket team looks forward to seeing you at the conference.