RocketBlog - a discussion about all things related to FPGA verification and debug

With FPGAs, bigger is better if you have the right design tools

This week Xilinx announced the first shipments and availability of its Virtex(R)-6 LX760 device. The FPGA market leader is touting the device as the industry's largest FPGA available and says it's for designers "who need raw logic density and industry-leading I/O performance." It's impressive all right, with 1,200 I/O pins and 25,920 Kbits of Block RAM embedded memory. It's been optimized on a UMC 40-nm process which Xilinx claims helps give it 15% higher performance and 50% lower system power consumption compared to competitive 40nm FPGA offerings.

All this is great and shows that the FPGA continue to give ASIC designers a very competitive option for high-performance applications. But with this continued march forward in complexity, the verification and debug challenges will also continue to mount.

We at GateRocket are all too familiar with designers' pain when it comes to verifying and debugging complex FPGAs. Particularly with first time FPGA users (who may have migrated over from more established ASIC methodologies and flows) who struggle with debug issues related to RTL quality and unfamiliar IP. And, seemingly endless synthesis-to-place-and-route loops slow design cycles down as well.

None of this is a result of the FPGA device itself - it's simply a factor of the significantly increased complexity that these devices enable. Therefore, adopters of these mega-FPGAs are looking for more efficient approaches to verification and debug. Particularly with debugging, the complexity of FPGAs makes debugging in the lab with firmware and logic analyzer almost impossible. Enter GateRocket.

With GateRocket designers can combine conventional simulation with physical hardware and an appropriate debugging environment to detect, isolate, identify, and resolve bugs, no matter where they originated in the design flow. Our RocketDrive lets designers plug the FPGA right into the native software simulation environment - we call in ‘device native simulation.'

FPGA suppliers like Xilinx are continuing to bring out larger, more complex chips that are quickly landing in applications that would have been exclusively the domain of ASICs a few years ago. We say ‘bring it on' - even though they do present more ASIC-like challenges, with tools like GateRocket at their disposal, we're sure designers will be up to the task.