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New RocketDrive® configurations support industry's most advanced Xilinx FPGA family
with tiered offering optimized for different device models

BEDFORD, MA - June 1, 2010 - GateRocket, Inc., the leading supplier of verification and debug solutions for advanced FPGAs, today announced new versions of its popular RocketDrive® product that incorporate FPGAs from the Xilinx (NASDAQ:XLNX) Virtex®-6 family of high performance programmable devices and significantly reduce the verification and debug time associated with these leading-edge devices. The Virtex-6 FPGAs are the highest performing and most advanced FPGAs available, allowing true system-on-chip (SoC) level integration that is well-suited to the needs of a wide range of electronic products.

GateRocket's RocketDrive cuts verification and lab debug time in half versus traditional FPGA design approaches. This is accomplished by integrating the FPGA into the HDL simulator to provide a "hardware in the loop" process based on GateRocket's proprietary Device Native® methodology. This technique allows execution of the design on the target FPGA device. By combining the actual FPGA hardware and RTL simulation models in the same verification run, this solution reduces verification and lab debugging time significantly.

"Our flagship Virtex-6 FPGA family and the GateRocket verification and debug solutions have improved the development efficiency and design bring-up time for some of our most advanced customers," said Dave Tokic, senior director for partner ecosystems and alliances at Xilinx. "We're pleased that Xilinx Alliance Program members like GateRocket are keeping pace with our technology advancements to deliver unique solutions that reduce design time for our customers."

Multiple configurations optimized for different user needs
The new Virtex-6 RocketDrives use the largest LX and SX devices for advanced logic and DSP applications respectively. GateRocket also offers a cost effective mid-range device configuration targeted at users who do not require the largest FPGA device in the family. By using devices optimized for specific needs, GateRocket can pass along the cost savings for an even greater return on investment. Each RocketDrive configuration offers the same enhanced verification performance and debug efficiency, and maintains complete compatibility with popular EDA logic simulators from Cadence, Mentor and Synopsys.

Advanced debugging with RocketVision® for Virtex-6 devices
The GateRocket solution allows designers using Virtex-6 devices to move effortlessly between RTL and the specific FPGA being targeted, combining actual FPGA hardware and RTL simulation models together in a single verification run, without changes in the design flow or methodology. This technique, called soft patch, provides engineers with the ability to make a change to one or more RTL blocks and re-run them along with the hardware implementations of the other blocks, thereby avoiding the need to rebuild the device for each fix and enabling multiple design-change-debug iterations in a single day. The net result is a time savings of up to 50% or more over traditional verification and debug approaches.

"As the FPGA industry continues to push the performance and capacity of its devices at every process node, the verification and debug challenges faced by designers also increase in lock-step. GateRocket is committed to providing verification and debugging solutions that allow Xilinx customers to more efficiently leverage the capabilities of the most sophisticated devices by addressing FPGA complexity and delivering a significant boost in productivity," said Dave Orecchio, president and CEO of GateRocket.

Pricing and availability
GateRocket offers support for the Xilinx Virtex-6 FPGA family with several RocketDrive configurations supporting both the LX and SX families of devices. Pricing starts at $25,000 with availability in July 2010.

About GateRocket
GateRocket, Inc., located in Bedford, Mass., offers electronic engineers Device Native® verification and debug solution for advanced FPGA semiconductor devices that can cut in half the verification and lab debug time for FPGA based projects. The company's RocketVision software debug tool and its RocketDrive hardware verification system enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.

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All trademarks mentioned herein are the property of their respective owners

BEDFORD, Mass. - May 26, 2010 - GateRocket® Inc. invites you to register for live product demos at next month's DAC, June 13-18 in Anaheim, to learn how to make FPGA design, debug and verification hassles little more than a "blast from the past!" GateRocket will also be a featured speaker at the DAC Exhibitor Forum on Wednesday, June 16, 3:55pm.

WHO: GateRocket®, supplier of advanced FPGA design and debug solutions for Xilinx and Altera programmable devices.

WHAT: GateRocket's RocketDrive cuts verification and lab debug time in half versus traditional approaches. This is accomplished by integrating the FPGA into the HDL simulator to provide a ‘native' execution of the design on the target FPGA device. By combining the actual FPGA hardware and RTL simulation models in the same verification run, this solution reduces verification and lab debugging time significantly.

WHEN: Design Automation Conference (DAC), June 13-18, Anaheim Convention Center.

WHERE: GateRocket Booth 1319, DAC, Anaheim Convention Center. Free rockets!

WHY: A recent FPGA Journal survey indicated that the process for identifying and fixing FPGAs by looping from the lab, where a bug is identified, back through simulation, synthesis, and place and route adds between 92 and 148 days to the FPGA design process. GateRocket has shown that its solutions can reduce this process by 55% or more by allowing the same bugs to be found and fixed during the simulation phase. According to FPGA Journal editor Kevin Morris: "By allowing the simulator to perform like the development board, many of us would be inclined to do more of our debug there, saving us some big time in the lab later on."

About GateRocket: GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision software debug tool and its RocketDrive hardware verification system
enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.

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All trademarks mentioned herein are the property of their respective owners.

BEDFORD, MA - May 10, 2010 - GateRocket, Inc., the leading supplier of verification and debug solutions for advanced FPGAs, today announced that Empirix, Inc. significantly reduced the development time for its latest complex FPGA-based design thanks to GateRocket's RocketVision® and RocketDrive® debug and verification solutions. Empirix, which provides the industry's most advanced solutions for testing and monitoring voice communications systems, used the GateRocket tool suite to save weeks of development time delivering its 10Gb equipped HAMMER XMS^TM solution to market compared to previous projects. The GateRocket solution enabled Empirix engineers to quickly find and correct errors in their FPGA design, reduce time in the development lab, and cut down on the number of simulation-synthesis-place-and-route iterations previously required to successfully bring up their FPGA.

"A next-generation FPGA was critical to the continued success of Hammer XMS, but the complexity and size of the new device, plus integrating additional complex IP, introduced a new level of debug and verification challenges. We had a very tough time debugging our previous FPGA design, which was much less complex, so we knew we needed a more efficient approach this time," said Mike Garofalo, Engineering Manager at Empirix. "By using the GateRocket solution to streamline our overall verification process, we saved at least two man-months on the very first project, and we expect that it will have even more value in the future as we exploit more of its capabilities at both block and chip-level verification."

The design team at Empirix had been frustrated on its previous FPGA project by a number of issues. For example, they had to trade off valuable FPGA resources between product functionality and on-chip logic analyzer signal capture/storage. And because of the finite amount of on-chip Block RAM, the team had to sacrifice the breadth of observable signals in order to get adequate depth for capture memories to store the results of long runs. These led to time-consuming iterations due to missed critical signals, with FPGA re-compile and re-map cycles taking 12-15 hours. The engineers also struggled to find the root-cause of bugs since logic errors, timing issues and tool-flow related bugs were mixed together at the system-level.

"Debugging FPGAs in the system is like looking at a complex world through a keyhole - it's a very narrow view, and one where you'd like to spend as little time as possible," observed Garofalo.

New FPGA family, new challenges

For the newest generation of HAMMER XMS, Empirix chose a leading-edge FPGA device family in which the FPGA design consumes 74% of the chip's logic resources and 100% of the Block RAM, leaving no extra memory for on-chip logic analyzers. They selected the RocketDrive system because its Device Native® approach to verification extends the existing simulation environment in a way that enables engineers to detect bugs in simulation that would otherwise slip through to system integration. RocketDrive, a hardware-based peripheral device, bridges the gap between the RTL and the FPGA and enables silicon-accurate simulation because it actually contains the target FPGA device. Empirix used the RocketDrive for full-chip verification after RTL simulation was completed and prior to system-level integration in the lab. With the help of the RocketDrive the team was able to discover a number of bugs, including errors in the input and output declarations to the synthesis tool. These relatively simple but elusive errors would have taken weeks to debug in the lab environment, but were immediately apparent in the RocketDrive since it validates the behavior of the actual FPGA hardware, post-synthesis.

GateRocket's RocketVision debugging software, an option for the RocketDrive, allowed the team to access the internal signals of the native FPGA hardware directly from the simulation debug environment and automatically detect any mismatches between the simulation model and the actual silicon. With the new "soft-patch" feature of RocketVision, Empirix engineers instantly swapped blocks between hardware and RTL representations, enabling them to get critical visibility on certain modules and test "what if" scenarios without having to rebuild the FPGA.

"If our FPGA design runs in the RocketDrive then we are confident that it will run in the system. That saves us weeks of system debugging time and dozens of RTL-to-bitstream iterations, each of which takes us two days or more," noted Garofalo. "GateRocket significantly reduces the risk of complex FPGA development and gives my team a lot more confidence in the schedule than they've had in past projects. And in the competitive market we're in, that's worth a lot."

About GateRocket

GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision® software debug tool and its RocketDrive hardware verification system enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.

BEDFORD, MA - April 20, 2010 - GateRocket, Inc., the leading supplier of verification and debug solutions for advanced FPGAs, today announced that Qualcomm, Incorporated (Nasdaq: QCOM), has adopted its RocketDrive and RocketVision products to address the increasing complexity of the FPGAs and ASICs its engineering teams are developing.

Qualcomm adopted GateRocket® after a comprehensive internal evaluation of the product's capabilities, particularly in the area of simulation acceleration. Initial evaluations resulted in improvements of 2-11x with limited impact on their existing verification flows. The company uses FPGAs extensively in prototyping large ASIC designs, which often requires many FPGAs to be used as a prototyping platform. Performing long serial test sequences for such large-scale designs can run for days and are difficult to partition into smaller design portions. Design teams will use the GateRocket products on their FPGA prototypes as a way to more efficiently verify and debug internally-developed IP, as well as system-level designs that will ultimately be implemented as ASICs.

"We're expecting GateRocket to help us streamline the verification process by accelerating logic simulation for the FPGAs and reducing the number of errors we find in the lab, all without disrupting our current design flow," said Steve LoCicero, Sr. Director of Engineering at Qualcomm. "The result is a much more efficient verification process for FPGA designs. We are pleased with the design cycle reductions made possible by GateRocket, and their support team has been extremely responsive in helping us adopt this approach."

A streamlined, interactive verification process

Qualcomm can achieve silicon-level accuracy through the RocketDrive verification system, which allows them to simulate their designs within the context of the FPGA device they are using. RocketDrive works seamlessly with Qualcomm's functional verification environment, and allows designers to move effortlessly between RTL and the FPGA being targeted, combining actual FPGA hardware and RTL simulation models in the same verification run. This technique provides engineers with the ability to make a change to one RTL block and re-run it along with the hardware representations of the other blocks, thereby avoiding the need to rebuild the FPGA for each fix and enabling multiple design-change-debug iterations in a single day.

About GateRocket

GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision software debug tool and its RocketDrive hardware verification system enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.

All trademarks mentioned herein are the property of their respective owners.

BEDFORD, Mass. - March 12, 2010 - GateRocket® Inc. CEO Dave Orecchio will be a featured speaker at this week's FPGA Virtual Summit, providing insight into how to streamline complex FPGA verification and debug by up to 50% or more, while improving design quality and results. Offered free of charge, the FPGA Virtual Summit is a live, interactive, online conference featuring experts from throughout the FPGA supply and design industries.

WHO: GateRocket®, supplier of advanced FPGA design and debug solutions for Xilinx and Altera programmable devices.

WHAT: Orecchio will be featured in the FPGA Virtual Summit's Verification Track, describing how his company's latest innovations and improvements in Version 5.0 of its RocketVision® debug and RocketDrive® verification solutions can improve designers' time to market with no changes to existing methodologies.

WHEN: March 18, 2010, 10AM - 6PM (Eastern). GateRocket will participate in the Verification Track which is being offered at 2:30PM (Eastern)/11:30AM (Pacific). Click here to register for this free event. The FPGA Virtual Summit will have five separate tracks, and attendees can participate in any or all of them:

• 10:00AM: DSP Applications: Improve your DSP designs with FPGAs

• 11:30AM: FPGA Design Tools: Get your FPGA designs to market faster

• 2:30PM: FPGA Verification: Do you see what I see?

• 4:30PM: Keynote: Executive Round Table: The Future of FPGAs

WHERE: The FPGA Virtual Summit is an online conference being held March 18, 2010. For more information:

http://www.fpgasummit.com

In a new approach with much more information than a single webinar but more focused than a general embedded conference, the FPGA Virtual Summit consists of five webcasts in a single day. The first four themed, technical sessions cover key topics for FPGA design engineers, system architects, and engineering decision makers. Each will wrap with an "Ask the Experts" panel for attendees to ask their questions and network with vendors.

WHY: The significant increase in complexity and size of leading-edge FPGAs has put a strain on traditional verification and debug methods used in FPGA design. GateRocket is exclusively focused on this crisis, providing a unique way to locate design errors, quickly correct them, and verify the entire design with an extremely fast solution. GateRocket recently released new enhancements to its RocketVision product that streamline this process even more, allowing designers to focus on individual portions of their design and make sure they function properly, without having to go through the entire synthesis-place-route cycle to identify and correct design flaws. This new approach dramatically reduces design time, and improves the efficiency of finding bugs in very complex designs.

About GateRocket: GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision software debug tool and its RocketDrive hardware verification system

enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.

Jim Hogan named to Advisory Board, Jim Wagner to lead sales operations

Bedford, Mass. - March 9, 2010 - GateRocket® Inc. has significantly bolstered its technical, marketing, and sales acumen with the addition of two savvy and experienced chip design industry veterans. Jim Hogan, well-known EDA entrepreneur, investor, and executive has joined the GateRocket Advisory board; and Jim Wagner, with extensive EDA sales experience, has been named GateRocket Director of Sales.

Hogan has worked in semiconductor design and manufacturing for more than 35 years. He is currently Managing Partner of Vista Ventures LLC, and an active strategic consultant to public and private technology companies. Prior to Vista, he was General Partner at Telos Venture Partners, and Senior Vice President of Business Development at Artisan Components. In a long and colorful career he held senior engineering, marketing and executive management positions at Cadence, National Semiconductor and Phillips Semiconductor.

"GateRocket's approach to FPGA design is positioned exactly where the market is going in terms of the complexity and performance needs of the fast-moving FPGA market," Hogan said. "GateRocket is an ideal company for me to be involved with because they have a game-changing technology to serve a large and growing market."

Sensing the same opportunity brought Wagner to GateRocket. He has 25 years of EDA industry experience both at large and startup companies. His sales career has spanned semiconductor and PCB design and design verification, signal integrity, and physical verification, and he grew accustomed to managing top-tier accounts with GenRad, Cadence, Viewlogic/Innoveda, Mentor Graphics, Sigrity, and Valor Computerized Systems.
"We have a great opportunity to improve and streamline the design process for complex FPGA designers," Wagner said. "I am very excited to be here at the perfect time to really help this company grow."

About GateRocket

GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision® software debug tool and its RocketDrive hardware verification system enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.

All trademarks mentioned herein are the property of their respective owners.

BEDFORD, Mass.-- February 23, 2010 --GateRocket, Inc., the leading supplier of verification and debug solutions for advanced FPGAs, today announced the availability of the newest version of its RocketVision® debugging software, further enhancing the company's innovative approach to reducing design time for high-end programmable devices from Altera and Xilinx. RocketVision 5.0 introduces new capabilities that allow designers to select individual design blocks to run in their simulator or GateRocket's RocketDrive® hardware verification system, the industry's only Device Native® approach to debug and verification. The features enable engineers to find and fix bugs faster, and avoid unnecessary re-runs of time-consuming synthesis-to-place-and-route iterations, reducing overall design bring-up time by 50% or more compared to traditional approaches.

The new enhancements improve the overall efficiency of RocketVision, a software-based debugging tool that is used in conjunction with popular simulation tools and GateRocket's RocketDrive hardware verification product. It provides simulators with visibility into the FPGA hardware and enables automated diagnosis by comparing intended behavior with actual results in the FPGA. With the new software release, designers now have the ability to move instances of one or more design blocks that were executing in the FPGA to run in the simulator. The user can then make changes to the RTL to fix bugs in their design and simulate them in software while the rest of the design executes in the native FPGA hardware in the RocketDrive.

"The significant increase in complexity and size of leading-edge FPGAs has put a strain on traditional verification and debug methods. GateRocket is focused exclusively on this FPGA debug crisis, providing a unique way to locate design errors, quickly correct them, and re-verify the entire design," said Dave Orecchio, GateRocket CEO. "These new enhancements streamline that process even more, allowing designers to fix problems on individual portions of their design without having to go through the entire design cycle each time. This approach has a dramatic impact on debugging efficiency for complex designs."

New features streamline debug process

The new SoftPatch feature allows engineers to try a "soft" RTL fix to the FPGA without rerunning synthesis and place-and-route, eliminating hours of unproductive waiting time. Typically, when a bug is discovered, each correction requires a new synthesis and place-and-route cycle, and it can take days to resolve each bug. This is especially problematic in complex FPGA designs which commonly have large amounts of unfamiliar IP and hundreds of thousands of design elements. The SoftPatch feature provides an intuitive and efficient way to sequence through each bug and test fixes for them without re-building the FPGA. In this way the user can verify multiple fixes in a single day and then perform an overnight build that encompasses all the changes - saving weeks or months over the course of a project.

The new version of RocketVision also includes an enhanced AutoCompare features that helps identify bugs at the block or full-chip level. It allows designers to automatically compare the signals between the RTL and hardware representations of the complete FPGA design and highlights any differences that occur. This significantly simplifies the debugging process and helps quickly identify the location of each divergence.

Pricing and Availability

Both the latest versions of RocketDrive and RocketVision now support 64-bit versions of the industry's most popular simulators from Mentor, Cadence and Synopsys. This enables the use of the RocketDrive with 64-bit simulation servers, which are increasingly necessary to handle the largest complexity FPGA designs.

RocketVision 5.0 is a RocketDrive option and is available immediately with a starting price of $9,500.

About GateRocket

GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision® software debug tool and its RocketDrive hardware verification system enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.

All trademarks mentioned herein are the property of their respective owners.

WHO: GateRocket, supplier of advanced FPGA design and debug solutions for Xilinx and Altera programmable devices.

WHAT: Exhibiting new, innovative technology to cut FPGA design and debug time by 50 percent or more. At the show, GateRocket will be taking the wraps of the latest innovations and improvements in Version 5.0 of its RocketVision debug and RocketDrive verification solutions.

WHEN: Feb. 22-25, 2010, DVCon, DoubleTree Hotel, San Jose, Calif.

WHERE: GateRocket will be demonstrating its products in DVCon Booth #802 - Attendees may sign up in advance for product demos at the show.

WHY: The significant increase in complexity and size of leading-edge FPGAs has put a strain on traditional verification and debug methods used in FPGA design. GateRocket is exclusively focused on this crisis, providing a unique way to locate design errors, quickly correct them, and verify the entire design with an extremely fast solution. These new enhancements streamline that process even more, allowing designers to focus on individual portions of their design and make

sure they function properly, without having to go through the entire design cycle each time. This will have a dramatic impact on the design times, and improve the efficiency of finding bugs in very complex designs.

About GateRocket: GateRocket, Inc., located in Bedford, Mass., offers electronic engineers the first Device Native® verification and debug solution for advanced FPGA semiconductor devices. The company's RocketVision software debug tool and its RocketDrive hardware verification system enables users to verify and debug advanced FPGA designs faster and with higher quality for greatly improved time-to-market, and realize more reliable and predictable results. Learn more about GateRocket online at www.gaterocket.com and sign up for a free webinar.
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All trademarks mentioned herein are the property of their respective owners.

The FPGA complexity race rolls on: The FPGA vendors have done amazing things with the new deep submicron 40 nm FPGA semiconductor devices. Altera's Stratix IV debuted with over 680K logical elements, the highest density, highest performance, and...  Read More >>

Bugs can originate at every stage in the FPGA design flow; debugging success depends on using the right tools and methods.  Read More >>